Infrastructure Engineer - HIL at Fort Robotics

<div class="content-intro"><p></p> <p></p> <p>In today's dynamic worksites, seamless collaboration between people and machines is essential. FORT's platform ensures safe, secure, and dynamic control that surpasses legacy systems and next-generation AI capabilities.</p> <p>While autonomous machines offer significant advantages, they also introduce new safety challenges. FORT addresses these concerns by providing solutions such as the Wireless E-Stop, which allows operators to instantly stop any machine from a safe distance, enhancing safety during emergencies.</p> <p>Additionally, FORT's Safe Remote Control enables operators to manage heavy machinery remotely, reducing the risk of accidents and improving visibility.</p> <p>By ensuring communications integrity across any network, FORT empowers customers to protect their most valuable assets—people, data, and machines—ensuring they remain safe and secure.</p> <p></p> <p></p></div><h3>&nbsp;</h3> <h3><span style="font-size: 14pt; font-family: arial, helvetica, sans-serif;"><strong>About Us</strong></span></h3> <p><span style="font-family: arial, helvetica, sans-serif;">We are on a mission to accomplish the impossible and build a safer future of autonomous and robotic machines. We are looking for a growth-minded and dynamic Infrastructure Engineer - Hardware-In-the-Loop (HIL) who embodies our values of excellence, ownership, collaboration, and effective communication.</span></p> <p>&nbsp;</p> <h3><span style="font-size: 14pt; font-family: arial, helvetica, sans-serif;"><strong>Role Overview</strong></span></h3> <p><span style="font-family: arial, helvetica, sans-serif;">We are seeking a Senior Engineer focused on building and scaling HIL test infrastructure and automation platforms. This role goes beyond test execution — you will design multi-bench systems, CI/CD-driven workflows, and reliable lab infrastructure to enable efficient, repeatable validation of Fort products.</span></p> <p>&nbsp;</p> <h2><span style="font-size: 14pt; font-family: arial, helvetica, sans-serif;"><strong>Responsibilities</strong></span></h2> <ul> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Design and scale Hardware-in-the-Loop (HIL) benches for system and device-level validation</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Build infrastructure for multi-bench orchestration (scheduling, parallel execution, resource management)</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Build and manage DevOps workflows for test infrastructure, including pipeline automation, environment provisioning, and artifact management.</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Design and integrate CI/CD pipelines for hardware-based testing</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Build containerized (like Docker) environments for reproducible test execution</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Develop systems to control hardware programmatically (power, connectivity, devices)</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Improve lab infrastructure, fixtures, and test environments for scalability and reliability</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Build logging, metrics, and observability systems for debugging and traceability</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Collaborate with firmware, cloud, and hardware teams to resolve system-level issues</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Mentor engineers and drive best practices for scalable test infrastructure</span></li> </ul> <p>&nbsp;</p> <h2><span style="font-size: 14pt; font-family: arial, helvetica, sans-serif;"><strong>Qualifications</strong></span></h2> <ul> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Bachelor’s or Master’s in Electrical Engineering, Computer Engineering, Computer Science, or related discipline preferred</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">5+ years of experience in embedded systems, robotics, or hardware-software systems</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Strong experience with HIL/SIL systems or test infrastructure</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Proficiency in Python for automation/framework development</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Experience designing automation systems at scale (multi-device, multi-environment, or distributed systems)</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Strong experience with CI/CD systems (GitLab, Jenkins, or similar), including pipeline design and automation workflows</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Experience with containerization technologies (Docker) and building reproducible development and test environments</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Familiarity with DevOps practices and scalable system design</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Experience with embedded communication protocols (Ethernet, CAN, BLE, Wi-Fi)</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Strong debugging skills across hardware and software systems</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Ability to design modular, maintainable systems and work cross-functionally</span></li> </ul> <p>&nbsp;</p> <h2><span style="font-size: 14pt; font-family: arial, helvetica, sans-serif;"><strong>Preferred</strong></span></h2> <ul> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Experience with distributed systems or orchestration platforms</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Experience with cloud/logging tools (Azure, Grafana, etc.)</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Knowledge of safety standards (IEC 61508, ISO 26262)</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Hands-on hardware/fixture design experience</span></li> <li style="font-family: arial, helvetica, sans-serif;"><span style="font-family: arial, helvetica, sans-serif;">Interest in applying AI/ML in daily engineering workflows</span></li> </ul>