Analog IC Design and Verification Engineer at Neuralink

<div class="content-intro"><p><strong>About Neuralink:</strong></p> <p>We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.</p></div><p><strong>Team Description:</strong></p> <p>The Brain Interfaces SoC Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.</p> <p><strong>Job Description and Responsibilities:</strong></p> <p>The engineer will be responsible for analog and mixed-signal chip design, from circuit design to layout and verification. Other responsibilities include:<strong><br></strong></p> <ul> <li>Design analog circuit building blocks and subsystems in transistor-level to achieve a variety of challenging noise, mismatch, distortion, power consumption, and cost requirements while satisfying top-level specifications</li> <li>Works with layout teams to oversee block-level layout of multiple blocks</li> <li>Planning and execution of analog verification plan for portion of IP or chip and runs complex simulations and analyses (e.g., power, performance, linearity, yield) on designs</li> <li>Designs, programs, and runs complex tests and reviews tests of junior team members; ensures bugs and other issues are identified and appropriately analyzed</li> <li>Consults with internal or external users and third-party vendors to guide implementation and ensure alignment with their needs and goals</li> </ul> <p><strong>Required Qualifications: </strong><strong><br></strong></p> <ul> <li>Bachelor of Science degree and additional experience in a related technical field for at least 5 years after receiving the BS degree</li> <li>Minimum 5 years of experience in analog/mixed-signal integrated CMOS circuit design for a specific area (e.g., delta-sigma ADC, SAR ADC, DAC, VCO, PLL, DLL, Audio CODEC and Class D audio amplifier, high speed PHY &amp; SERDES) with a successful track record of silicon validation</li> <li>The ideal candidates are people who get excited about building things, are highly analytical, and enjoy tackling new problems regularly</li> </ul> <p><strong>Preferred Qualifications:</strong></p> <ul> <li>Masters or PhD in electrical engineering, physics, or other related fields</li> <li>Experience with design for high-volume production</li> <li>Experience in lab testing of high-precision analog and mixed-signal ICs</li> <li>Functional modeling experience and logic verification with Verilog AMS and SystemVerilog</li> <li>Experience in design and layout with advanced CMOS FinFET technologies</li> <li>Skills in scripting and automation for complex simulation scenarios</li> </ul><div class="content-pay-transparency"><div class="pay-input"><div class="description"><p><strong>Expected Compensation:</strong></p> <p>The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees’ success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.</p></div><div class="title">Base Salary Range:</div><div class="pay-range"><span>$125,000</span><span class="divider">&mdash;</span><span>$291,000 USD</span></div></div></div><div class="content-conclusion"><div> <p><strong>What We Offer:</strong></p> <p>Full-time employees are eligible for the following benefits listed below.</p> <ul> <li>An opportunity to change the world and work with some of the smartest and most talented experts from different fields</li> <li>Growth potential; we rapidly advance team members who have an outsized impact</li> <li>Excellent medical, dental, and vision insurance through a PPO plan</li> <li>Paid holidays</li> <li>Commuter benefits</li> <li>Meals provided</li> <li>Equity (RSUs) <em>*Temporary Employees &amp; Interns excluded</em></li> <li>401(k) plan <em>*Interns initially excluded until they work 1,000 hours</em></li> <li>Parental leave <em>*Temporary Employees &amp; Interns excluded</em></li> <li>Flexible time off <em>*Temporary Employees &amp; Interns excluded</em></li> </ul> </div></div>