Signal Processing Engineer at Neuralink

<div class="content-intro"><p><strong>About Neuralink:</strong></p> <p>We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.</p></div><h3><strong>Job Summary</strong></h3> <p>We are seeking a talented <strong>Signal Processing Engineer</strong> to design, develop, and optimize advanced digital signal processing (DSP) algorithms for on-chip and embedded implementation. In this role, you will create efficient, hardware-friendly algorithms that run directly on custom SoCs, enabling real-time processing with constraints on power, latency, area, and throughput. You will collaborate closely with the SoC, Firmware, and Machine Learning teams to translate high-level signal processing needs into production-ready solutions.</p> <h3><strong>Key Responsibilities</strong></h3> <ul> <li>Design and develop signal processing algorithms for sensing neural activity in the cortex (e.g. spike detection), monitoring cortical electrode health, and more.</li> <li>Design and develop numerical algorithms, such as custom data compression to increase radio throughput.</li> <li>Develop fixed-point or quantized versions of algorithms optimized for constrained hardware.</li> <li>Implement and verify algorithms in high-level languages and transition them to hardware-friendly representations.</li> <li>Perform algorithm-to-architecture mapping: analyze trade-offs between accuracy, latency, power, and resource utilization on the SoCs.</li> <li>Collaborate with the digital design team to define micro-architectures for custom on-chip processing pipelines, including dataflow, pipelining, and parallelization.</li> </ul> <h3><strong>Required Qualifications</strong></h3> <ul> <li><strong>Education</strong>: BS, MS or PhD in Electrical Engineering, Computer Engineering, Signal Processing, or a related field.</li> <li><strong>Experience</strong>: 3+ years in digital signal processing algorithm development or real-world products, with a focus on embedded or hardware-constrained implementations.</li> <li>Fluent in signal processing fundamentals (both analog and digital) and strong numerical capabilities.</li> <li>Familiarity with fixed-point arithmetic, quantization effects, and numerical precision trade-offs.</li> <li>Proficiency in Python and C for algorithm prototyping and simulation.</li> </ul> <h3><strong>Preferred Qualifications</strong></h3> <ul> <li>Hands-on experience with Verilog/VHDL, or transitioning algorithms to RTL.</li> <li>Experience with dedicated DSP cores or accelerators.</li> <li>Track record of optimizing for power/area/latency in resource-constrained environments.</li> </ul> <div class="description"> <div class="body"> <p><strong>Expected Compensation:</strong></p> <p>The anticipated base salary for this position is expected to be within the following range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training. We also believe in aligning our employees’ success with the company's long-term growth. As such, in addition to base salary, Neuralink offers equity compensation (in the form of Restricted Stock Units (RSU)) for all full-time employees.</p> </div> </div> <p class="body body--medium">Base Salary Range:</p> <p class="body">&nbsp;$121,000 - $230,500</p><div class="content-conclusion"><div> <p><strong>What We Offer:</strong></p> <p>Full-time employees are eligible for the following benefits listed below.</p> <ul> <li>An opportunity to change the world and work with some of the smartest and most talented experts from different fields</li> <li>Growth potential; we rapidly advance team members who have an outsized impact</li> <li>Excellent medical, dental, and vision insurance through a PPO plan</li> <li>Paid holidays</li> <li>Commuter benefits</li> <li>Meals provided</li> <li>Equity (RSUs) <em>*Temporary Employees &amp; Interns excluded</em></li> <li>401(k) plan <em>*Interns initially excluded until they work 1,000 hours</em></li> <li>Parental leave <em>*Temporary Employees &amp; Interns excluded</em></li> <li>Flexible time off <em>*Temporary Employees &amp; Interns excluded</em></li> </ul> </div></div>