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Senior Electrical Engineer- SDR Hardware at Astranis
San FranciscoFull-time3205 SDR HardwarePosted 6 months ago
Apply with PipelineAbout the Role
<div class="content-intro"><p>Astranis builds advanced satellites for high orbits, expanding humanity’s reach into the solar system. Today Astranis satellites provide dedicated, secure networks to highly-sophisticated customers across the globe – large enterprises, sovereign governments, and the US military. </p>
<p>With five satellites on orbit and many more set to launch soon, the company is servicing a backlog of more than $1 billion of commercial contracts. Astranis is the preferred satellite communications partner for buyers with stringent requirements for uptime, data security, network visibility, and customization.</p>
<p>Astranis has raised over $1.2 billion from some of the world’s best investors, including Andreessen Horowitz, Baillie Gifford, Blackrock, Fidelity, Franklin Templeton, and Snowpoint, and employs a team of 500 engineers and entrepreneurs. Astranis designs, builds, and operates its satellites out of its 153,000 sq. ft. headquarters in Northern California, USA.</p></div><p><span style="font-family: helvetica, arial, sans-serif;"><strong>Senior Electrical Engineer - SDR Hardware Design</strong></span></p>
<p><span style="font-family: helvetica, arial, sans-serif;">As a software defined radio Hardware Engineer at Astranis you will be responsible for the design, qualification, and test of our custom software defined radios. We're looking for professionals who are confident in designing state of the art high speed hardware. If you think of signals in volts, bits, and dB's, this is the role for you! You will work closely with the RTL, Comms, and RF design teams to help design the best possible radio systems for our payload and TTC systems.</span></p>
<p><span style="font-family: helvetica, arial, sans-serif;"><strong>Role</strong></span></p>
<ul>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Work with state of the art FPGAs</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Design and test high speed digital SERDES interface</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Characterize and optimize wide bandwidth data converter performance</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Identify devices that satisfy performance requirements</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Design and layout highspeed digital PCBs</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Test and validate full radio signal chain</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Work cross-functionally to Integrate systems into different spacecrafts</span></li>
</ul>
<p><span style="font-family: helvetica, arial, sans-serif;"><strong>Requirements</strong></span></p>
<ul>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">5-10+ years of experience</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">B.S. or M.S. in electrical or computer engineering, or equivalent technical degree</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience with digital communications theory and measurement</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Comfortable working with full RF signal chain</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience with RF test equipment(VNA, Spectrum analyzer, Signal generator)</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">A passion for hardware development, including working in a fast-paced environment and hands-on design and development</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Demonstrated ability to personally design, build, and test hardware from scratch</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience with Altium or similar EDA tools</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience with PCB design</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Strong analog/mixed-signal circuit design skills</span></li>
</ul>
<p><span style="font-family: helvetica, arial, sans-serif;"><strong>Bonus</strong></span></p>
<ul>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience using state of the art wideband programmable data converters</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience designing high speed clock trees</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience designing systems for high reliability (Aerospace/defense or automotive)</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Familiarity with radio nonidealities (HD, IMD, IQ imbalance, gain ripple, group delay distortion)</span></li>
<li style="font-family: helvetica, arial, sans-serif;"><span style="font-family: helvetica, arial, sans-serif;">Experience with Python for measurement automation and data analysis</span></li>
</ul><div class="content-pay-transparency"><div class="pay-input"><div class="description"><div><strong>What we offer: </strong></div>
<div> </div>
<div>All our positions offer a compensation package that includes equity and robust benefits.</div>
<div> </div>
<div>
<p data-path-to-node="3">Base pay is just one component of Astranis’s total rewards package. Your compensation also includes a significant equity package via incentive stock options, high-quality company-subsidized healthcare, disability and life insurance, 401(k) retirement planning, flexible PTO, and free on-site catered meals.</p>
</div>
<div>Astranis pay ranges are informed and defined through professional-grade salary surveys and compensation data sources. The actual base salary offered to a successful candidate will additionally be influenced by a variety of factors including experience, credentials & certifications, educational attainment, skill level requirements, and the level and scope of the position.</div></div><div class="title">Base Salary</div><div class="pay-range"><span>$175,000</span><span class="divider">—</span><span>$240,000 USD</span></div></div></div><div class="content-conclusion"><div><strong>U.S. Citizenship, Lawful Permanent Residency, or Refugee/Asylee Status Required</strong></div>
<div>(To comply with U.S. Government space technology export regulations, applicant must be a U.S. citizen, lawful permanent resident of the United States, or other protected individual as defined by 8 U.S.C. 1324b(a)(3))</div>
<div> </div>
<div>Our mission and products are built for everyone, regardless of gender, race, creed, or background. We believe in a diverse and inclusive workplace, and we invite all people to join our team and bring their unique perspectives to make us stronger.</div>
<h4><strong><span data-markdown-start-index="1800">Astranis SMS Terms of Service</span></strong></h4>
<ol>
<li>
<p><strong><span data-markdown-start-index="1837">Recruiting Updates:</span></strong><span data-markdown-start-index="1858"> By opting in, you agree to receive SMS updates, interview coordination, and recruiting communications from Astranis Space Technologies Corp.</span></p>
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<p><strong><span data-markdown-start-index="2004">Opt-Out:</span></strong><span data-markdown-start-index="2014"> You can cancel this service at any time by replying </span><strong><span data-markdown-start-index="2069">STOP</span></strong><span data-markdown-start-index="2075">. We will send one final text confirming your unsubscription.</span></p>
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<p><strong><span data-markdown-start-index="2142">Opt-In Again:</span></strong><span data-markdown-start-index="2157"> To resume receiving messages, reply </span><strong><span data-markdown-start-index="2196">START</span></strong><span data-markdown-start-index="2203"> or </span><strong><span data-markdown-start-index="2209">YES</span></strong><span data-markdown-start-index="2214">.</span></p>
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<p><strong><span data-markdown-start-index="2220">Support & Rates:</span></strong><span data-markdown-start-index="2238"> For assistance, reply </span><strong><span data-markdown-start-index="2263">HELP</span></strong><span data-markdown-start-index="2269"> or contact us at [email protected]. Message and data rates may apply. Message frequency varies; carriers are not liable for delayed or undelivered messages.</span></p>
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<p><strong><span data-markdown-start-index="2427">Privacy:</span></strong><span data-markdown-start-index="2437"> For details on how we protect your data, view our </span><a href="https://www.google.com/url?q=https%3A%2F%2Fwww.astranis.com%2Flegal%2Fprivacy" target="_blank"><span data-markdown-start-index="2489">Privacy Policy</span></a><span data-markdown-start-index="2544">.</span></p>
</li>
</ol></div>
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