Senior PCB Design Engineer at Echodyne

Kirkland, WAFull-timeResearch and DevelopmentPosted 22 days ago

About the Role

<div class="content-intro"><hr> <h3>Radar Reinvented.</h3> <blockquote> <p><span style="font-size: 10pt;">Echodyne offers the world’s first compact solid-state true beam-steering radar for a wide range of industries and applications. Our high-performance radars work in all weather and are designed for autonomous vehicles, uncrewed aircraft & drones, and security of borders, critical infrastructure, and smart cities. The company combines the patented technology of metamaterials with powerful software to create a radar sensor with unprecedented performance at commercial price points. Echodyne offers its radars to companies working in Automotive, Transportation, Critical Infrastructure Protection, Border Security, Smart Cities, Uncrewed Aircraft Systems (UAS), and Airspace Management including Urban Air Mobility (UTM).</span></p> </blockquote> <hr></div><h2><span style="color: #005cb9;" data-darkreader-inline-color="">Echodyne is seeking a Senior PCB Design Engineer to join our fast-growing team. </span></h2> <h3><strong><span style="color: rgb(0, 92, 185);" data-darkreader-inline-color="">ROLE OVERVIEW</span></strong></h3> <p><span data-contrast="auto">High-performance printed circuit boards are critical to Echodyne’s advanced radar products. Echodyne is seeking a Senior PCB Design Engineer to join our PCB Design team and own complex board designs for our radar products and related hardware.</span><span data-ccp-props="{"335551550":6,"335551620":6,"335559739":0}"> </span></p> <p><span data-contrast="auto">In this role, you will work closely with Analog/Mixed-Signal (AMS), RF, Mechanical, and Manufacturing Engineering, as well as external suppliers, to translate schematics, performance requirements, and physical constraints into high-performance, reliable, and manufacturable designs. You will play a key role throughout the product lifecycle, from layout planning and design release through new product introduction (NPI), production, and sustaining. The ideal candidate brings strong hands-on PCB design expertise, with sound technical judgment, and effective cross-functional collaboration.</span><span data-ccp-props="{"335551550":6,"335551620":6,"335559739":0}"> </span></p> <h3 style="line-height: normal;"><span style="color: #005cb9;" data-darkreader-inline-color=""><strong>RESPONSIBILITIES</strong></span></h3> <ul> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1"><span data-contrast="auto">Independently plan and drive assigned PCB designs from schematic review through production release, including estimates, priorities, dependencies, technical risks, and status.</span> </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Translate schematics, electrical requirements, and mechanical constraints into complex multilayer PCBAs for analog, RF, and mixed-signal applications. Collaborate with Engineering and PCB fabricators to establish board outlines, stackups, materials, placement, routing, controlled impedance, via structures, and other physical design requirements. </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Apply signal integrity, power integrity, electromagnetic compatibility, thermal, reliability, and design for manufacturability, assembly, and test (DFM/DFA/DFT) best practices. </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Work with Electrical Engineering, Quality, Manufacturing Engineering, and external vendors to optimize designs for cost, quality, and manufacturability. </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Support new product introduction (NPI), product revisions, and sustaining changes by working with cross-functional teams and suppliers to resolve fabrication, assembly, build, yield, and production issues. </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Create, review, and maintain component symbols, footprints, 3D models, in the company wide component library. </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Provide technical guidance to less experienced PCB designers and improve PCB design methods, standards, tool flows, and review and release practices. </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="1" data-aria-level="1">Work with RF Engineering and Analog/Mixed Signal design teams to learn requirements and key features, understand how these features match with vendor capabilities, and implement best practices in Schematic and Layout<span data-ccp-props="{"201341983":2,"335551550":6,"335551620":6,"335559739":0,"335559740":221}"> </span></li> </ul> <h3><strong><span style="color: #005cb9;" data-darkreader-inline-color="">REQUIRED SKILLS / EXPERIENCE</span></strong></h3> <ul> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1"><span data-contrast="auto">Proficiency with Altium Designer or similar PCB design software and the ability to interpret complex schematics</span> </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1">Knowledge of PCB layout practices for RF, millimeter-wave, high-speed digital, mixed-signal, analog, and power applications </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1">Knowledge of PCB stackups, materials, controlled impedance, via structures, finishes, fabrication processes, and assembly methods </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1">Practical application of design for manufacturability, assembly, and test principles </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1">Knowledge of applicable IPC standards and controlled PCB fabrication, assembly, and release documentation requirements </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="9" data-aria-level="1">Ability to prioritize multiple assignments from broad direction and communicate effectively with cross-functional teams, fabricators, and contract manufacturers<span data-ccp-props="{"201341983":2,"335551550":6,"335551620":6,"335559739":0,"335559740":221}"> </span></li> </ul> <h3><span style="color: rgb(0, 92, 185);" data-darkreader-inline-color=""><strong>DESIRED SKILLS / EXPERIENCE <br>(Looking for one or more as a complement to the core skills)</strong> </span></h3> <ul> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="15" data-aria-level="1"><span data-contrast="auto">Experience developing PCB designs for radar, aerospace, defense, RF, or other high-reliability electronic products</span> </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="15" data-aria-level="1">Experience with high-density interconnect (HDI), high layer count, rigid-flex, flex circuit, or other advanced PCB technologies </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="15" data-aria-level="1">Experience with Arena or a similar product lifecycle management (PLM) system </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="15" data-aria-level="1">IPC CID, CID+, or other relevant PCB design certification<span data-ccp-props="{"201341983":2,"335551550":6,"335551620":6,"335559739":0,"335559740":221}"> </span></li> </ul> <h3><strong><span style="color: rgb(0, 92, 185);" data-darkreader-inline-color="">QUALIFICATIONS</span></strong></h3> <ul> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="19" data-aria-level="1"><span data-contrast="auto">Bachelor's degree in Electronics, Electrical Engineering Technology, a related technical field, or equivalent experience and 10 or more years of relevant PCB design experience, or an equivalent combination of education and industry experience</span> </li> <li data-leveltext="" data-font="Symbol" data-listid="7" data-list-defn-props="{"335552541":1,"335559685":720,"335559991":360,"469769226":"Symbol","469769242":[8226],"469777803":"left","469777804":"","469777815":"hybridMultilevel"}" data-aria-posinset="19" data-aria-level="1">Eligibility to handle export-controlled technical data, including ITAR and EAR-controlled information<span data-ccp-props="{"201341983":2,"335551550":6,"335551620":6,"335559739":0,"335559740":221}"> </span></li> </ul> <blockquote> <p><span style="font-size: 12pt; color: #000000;" data-darkreader-inline-color="">Echodyne’s technology is export controlled by the U.S. Government and we must evaluate an applicant’s eligibility to handle export-controlled information or obtain required Government authorizations.  Therefore, we will ask you as part of the application process to identify whether you are a U.S. Citizen or green card holder, or have asylum/refugee status in the U.S. </span></p> </blockquote> <hr> <h3><strong><span style="color: #005cb9;" data-darkreader-inline-color="">WHAT WE OFFER</span></strong></h3> <h3>This is an exempt role.</h3><div class="content-pay-transparency"><div class="pay-input"><div class="title">The expected annual salary range for this role is</div><div class="pay-range"><span>$124,733</span><span class="divider">—</span><span>$187,048 USD</span></div></div></div><div class="content-conclusion"><p><strong>If your skills generally align but not perfectly, please apply anyway. There may be another role that’s a great fit for you!</strong></p> <p><strong>We offer competitive compensation and benefits to our full-time, US-based employees, including:</strong></p> <ul> <li>RSU (Restricted Stock Units)</li> <li>Generous Benefits:</li> <ul> <li>Fully-paid medical, dental, and vision insurance premiums for you </li> <ul> <li>Choice of PPO or HDHP/HSA</li> <li>Virtual Care – 98Point6</li> <li>Employee Assistance Program</li> </ul> </ul> <li>Mental Health coverage through Springhealth & Talkspace (Premera)</li> <li>Travel Assistance Insurance</li> <li>Company Paid Life Insurance</li> <li>Company Paid Short & Long Term Disability</li> <li>Flexible PTO (exempt) / 15 days per year (non-exempt)</li> <li>401(k) match</li> <li>Pet Insurance</li> <li>Prepaid Legal Program</li> <li>Commuter Benefits</li> <li>Paid Company Holidays</li> </ul> <hr> <p> </p> <p><span style="color: #005cb9;"><strong>All qualified applicants receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, age, status as a protected veteran or any other characteristic protected by law.</strong></span></p> <hr> <p> </p> <p> </p></div>

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