Lead Engineer Embedded Linux BSP at GreenWave™ Radios

<div class="content-intro"><div> <p>InnoPhase Inc., DBA GreenWave Radios™, is at the forefront of innovation in Open RAN digital radios. Our cutting-edge solutions, powered by the Hermes64 RF SoC, are designed to enhance network energy efficiency while dramatically reducing operational expenses, with purpose-built silicon that is the heart of ORAN-based active antenna arrays.</p> <div> <p>Headquartered in San Diego, California, GreenWave Radios™ has established itself as a pioneer in delivering power-efficient digital-to-RF solutions. The company is supported by a talented team of over 100 engineers spread across four global R&amp;D facilities. With an extensive portfolio of more than 120 global patents, GreenWave Radios™ continues to push the boundaries of radio technology and innovation.</p> </div> <p>To learn more about GreenWave Radios™ and hear what our employees have to say, <span style="margin: 0px; padding: 0px;">visit the GreenWave™ certification profile at&nbsp;<a href="https://www.greatplacetowork.com/certified-company/7046241" target="_blank">GreatPlacetoWork.com&nbsp;</a>or explore our&nbsp;<a href="https://greenwaveradios.com/">Home - GreenWave Radios website.</a></span></p> </div></div><div> <p>InnoPhase Inc., DBA GreenWave™ Radios and Synergic Emergence have a co-employment relationship. For over three years, GreenWave Radios has partnered with Synergic Emergence, a professional employment organization provider, to offer our employees the best benefits and services. This arrangement means that Synergic Emergence provides employee pay checks and benefits, and GreenWave Radios will provide employment, evaluation, and advancement. By outsourcing some HR functions, GreenWave Radios can focus on what we do best – developing and implementing highly innovative SOC cellular radio integrated circuit products.</p> <p><strong>This&nbsp;is a BSP-focused leadership role</strong> for an engineer who brings deep&nbsp;expertise&nbsp;in board bring-up, Linux kernel, and platform software on ARM-based&nbsp;SoCs&nbsp;.&nbsp;The role centres on owning the software platform layer for O-RU products built on Xilinx&nbsp;MPSoC,&nbsp;RFSoC, or equivalent SoCs. FPGA experience is welcome and&nbsp;advantageous, but the core mandate is delivering a robust, production-grade BSP and embedded Linux stack that enables the full O-RU signal chain and O-RAN management plane.&nbsp;You will lead a team of BSP and embedded software engineers, define the platform software architecture, and collaborate closely with hardware, RF, PHY, and FPGA teams to bring O-RU platforms from silicon to production.&nbsp;</p> <p><strong>Key Responsibilities</strong></p> <ul> <li>Own end-to-end BSP development for O-RU platforms based on Xilinx ZU+&nbsp;MPSoC&nbsp;/&nbsp;RFSoC&nbsp;or other ARM Cortex-A/R SoCs.&nbsp;</li> <li>Lead hardware bring-up from bare board to functional system: power sequencing, clocking, DDR training, peripheral initialization.&nbsp;</li> <li>Develop and maintain FSBL (First Stage Bootloader), PMU/PLM firmware, ARM Trusted Firmware (TF-A), and U-Boot for Zynq&nbsp;UltraScale+ and Versal platforms.&nbsp;</li> <li>Author and&nbsp;maintain&nbsp;device tree sources (DTS) for all platform peripherals: RF Data Converter tiles, DMA engines, Ethernet MACs, UART, I2C, SPI, GPIO.&nbsp;</li> <li>Develop production-grade Linux BSP using&nbsp;PetaLinux&nbsp;/&nbsp;Yocto&nbsp;with custom meta-layers for O-RU hardware.</li> <li>Collaborate with hardware team on schematic reviews, signal integrity, and component selection for SoC peripherals.</li> <li>Port, customize, and maintain Linux kernel for target SoC platform aligned with LTS releases (5.15, 6.1, 6.6).</li> <li>Develop Linux kernel drivers for platform-specific peripherals: Xilinx RFDC (RF Data Converter), AXI DMA / MCDMA, high-speed Ethernet (10G/25G), PTP hardware clock.</li> <li>Debug kernel panics, memory corruption, latency spikes, and boot failures using JTAG, GDB, ftrace, perf, and crash analysis.</li> <li>Profile and optimize BSP-level latency to meet O-RAN T2a / Ta3 timing requirements from fronthaul interface to RF chain.</li> <li>Develop and maintain IEEE 1588v2 PTP (G.8275.1 Telecom Profile) and SyncE software stack for O-RAN S-Plane timing compliance.</li> <li>Build and maintain Yocto-based Linux distro with BSP layer, security hardening (dm-verity, secure boot, TrustZone), and OTA update support via SWUpdate.</li> <li>Integrate Xilinx PL (Programmable Logic) IP blocks — eCPRI framer, IQ DMA, beamforming control — with PS-side Linux drivers via AXI4-Lite and AXI4- Stream<strong><em>.</em></strong></li> <li>Represent BSP platform in cross-functional reviews with RF, PHY, O-RAN stack, and product teams.</li> </ul> <p><strong>Job requirements</strong></p> <ul> <li>8+ years of core BSP &amp; Embedded Linux&nbsp;Experience with B.E. /&nbsp;B.Tech&nbsp;or&nbsp;M.Tech&nbsp;in Electronics &amp; Communication, Electrical Engineering, or Computer Engineering.</li> <li>Deep&nbsp;expertise&nbsp;in BSP development for ARM Cortex-A/R SoCs.&nbsp;</li> <li>Hands-on Linux kernel internals: memory management, DMA subsystem, interrupt handling, device tree, clock framework, power management (PM / PSCI).&nbsp;</li> <li>Strong C programming skills for kernel and embedded firmware development.</li> <li>Scripting: Python, Bash,&nbsp;Tcl&nbsp;for build automation, test scripting, and hardware bring-up utilities.&nbsp;</li> <li>Hardware debug skills: JTAG (Lauterbach, Xilinx HS3 / HS2), oscilloscope, logic analyser, serial console bring-up.&nbsp;</li> <li>Familiarity with O-RAN Alliance O-RU architecture and WG4 fronthaul split (eCPRI, CUS-Plane, M-Plane, S-Plane).&nbsp;</li> <li>C++ experience for developing BSP-level user-space services, configuration daemons, or test&nbsp;harnesses.</li> </ul> <p><strong>Benefits:</strong></p> <ul> <li>Competitive salary and stock options.</li> <li>Learning and development opportunities.</li> <li>Employer-paid health Insurance.</li> <li>Earned, Casual, Sick &amp; parental leaves.</li> </ul> </div> <div>&nbsp;</div> <div><br><br></div>