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Astera Labs

Principal Hardware Validation Engineer at Astera Labs

San Jose, California, United StatesFull-timeAdvanced Hardware EngineeringPosted 2 months ago
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About the Role

<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">As a Principal Hardware Validation Engineer<strong>&nbsp;</strong>you will join the Hardware Electrical Validation team at Astera Labs, linking between the Hardware Electrical Design teams and Post-Silicon Electrical Validation teams, among others.&nbsp;</span></p> <p style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);">Note: This role is not post-silicon electrical validation; it is electrical validation of PCBAs and related&nbsp;hardware products.</span></p> <p style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><strong>Key Responsibilities</strong></span></p> <ul style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Support the Hardware Electrical Design teams with de-risking circuits and modules from project kick-off to gerber out.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Develop comprehensive hardware electrical validation plans using correct test methods and processes.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Bring up the PCBAs upon arrival in the lab, and execute the electrical validation plans to validate all circuits on the board.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Debug complex multi-point failures in hardware - power regulators, DPMs, clock synthesizers, digital control paths, I2C, SPI, etc.&nbsp; &nbsp;</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Rework components on the PCBAs to unblock debugging activities.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Pre-empt and de-risk system validation architectures - collaborate with the System Validation teams.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Support hardware activities in auxiliary teams - Post-Silicon Electrical Validation, Product Apps, System Validation, FAEs, etc.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Support the new designs using knowledge of existing products to de-risk new features and requirements.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Self-informed of new industry test standards and equipment to introduce modern testing methodologies.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Specify test equipment, develop test fixtures, help improve hardware lab functions.</span></li> </ul> <p style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><strong>Required Skills</strong></span></p> <ul style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Demonstrated strong skills in electronic circuit analysis, comprehensive testing and debug</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Bachelor degree in EE with 3+ years of experience in hardware test or design</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Expert understanding of design and test for power regulators, PDNs, Bode, clock generators</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Ability to produce test description from a schematic design, and execute and document results</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Demonstrated knowledge of the full hardware product lifecycle from Project Kick-off to RTM</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Lab equipment for hardware test - oscilloscopes, e-loads, VNA, TDR, environmental chambers, etc.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Automating lab equipment to optimize test processes, Python preferred</span></li> </ul> <p style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><strong>Preferred Skills</strong></span></p> <ul style="color: rgb(34, 34, 34); font-family: Arial, Helvetica, sans-serif; font-style: normal; font-weight: 400; letter-spacing: normal; white-space: normal; word-spacing: 0px; text-align: left;"> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Measurements of high-speed interfaces - PCIe, DDR, 25/50G/100G SERDES, etc.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">EMI/EMC compliance</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Technical writing skills - ECOs, Bug Reports, Rework WIs, MCOs, etc.</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">PLM, Arena or equivalent</span></li> <li style="margin-left: 15px; font-family: helvetica, arial, sans-serif; font-size: 12pt; color: rgb(0, 0, 0);"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">Understanding of the ASIC/silicon product development process</span></li> </ul> <p class="p8i6j01 paragraph"><span style="font-family: helvetica, arial, sans-serif; font-size: 12pt;">The base salary range is $185,000 USD - $240,000 USD. Your base salary will be determined based on your location, experience, and the pay of employees in similar positions.</span></p> <p>&nbsp;</p><div class="content-conclusion"><p>We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.</p></div>