Director, Photonics Hardware Validation at Lightmatter

<div class="content-intro"><p>Lightmatter is leading the revolution in AI data center infrastructure, enabling the next giant leaps in human progress. The company invented the world’s first 3D-stacked photonics engine, Passage™, capable of connecting thousands to millions of processors at the speed of light in extreme-scale data centers for the most advanced AI and HPC workloads.</p> <p>Lightmatter raised $400 million in its Series D round, reaching a valuation of $4.4 billion. We will continue to accelerate the development of data center photonics and grow every department at Lightmatter!</p> <p>If you're passionate about tackling complex challenges, making an impact, and being an expert in your craft, join our team of brilliant scientists, engineers, and accomplished industry leaders.</p> <p>Lightmatter is (re)inventing the future of computing with light!</p></div><p>In this pivotal role within Silicon Engineering, you will own the end-to-end post-silicon validation strategy and execution across optical, electrical, and system level. You will collaborate directly with Silicon Design, Laser, Packaging, Software, and Supply Chain leadership to architect scalable lab infrastructure, drive automated testing frameworks, and ensure our products meet world-class reliability standards for hyperscale AI data centers.</p> <p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Responsibilities</strong></span></p> <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Scale the product validation team by recruiting, mentoring, and developing multi-disciplinary talent across optical, electrical, software, and automation domains.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Drive silicon and platform validation strategies, requirements, and execution plans for our optical interconnect platform.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Architect and define comprehensive, at-scale validation environments, test frameworks, automated test suites, and telemetry data collection workflows.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Analyze silicon and system architecture to identify integration risks, design gaps, and marginality issues requiring rigorous corner validation.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Oversee the execution of validation plans, leading technical triage and root-cause debug for hardware, firmware, and system-level issues.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Partner closely with Silicon, Packaging, Hardware, and Software teams to align validation coverage with design specifications and system requirements.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Influence pre-silicon design and simulation milestones to ensure feature completeness, advocating for validation hooks, telemetry sensors, and diagnostic monitors on-chip and on reference platforms.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Drive hardware and software automation initiatives to enhance testing throughput, repeatability, and data analytics capabilities across validation labs.</span></li> </ul> <p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Qualifications&nbsp;</strong></span></p> <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">BS, MS, or Ph.D. in Electrical Engineering, Computer Engineering, Photonics, Physics, or a related technical field.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">12+ years of semiconductor or hardware validation experience, with significant exposure to optical/photonics link-level products.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Strong technical background in laser, optics, or silicon photonics architecture and characterization.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">5+ years of experience developing test content, automation infrastructure, and scripting in Python or C++.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Proven leadership track record managing cross-functional engineering teams in a fast-paced environment working on transceivers or link-level products.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Solid understanding of industry standard requirements (IEEE, MSA, OIF) and product validation through corner testing (temperature, voltage, and process matrices), including defining validation plans and generating validation reports.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Demonstrated ability to establish process improvements, test methodologies, and data analysis workflows.</span></li> </ul> <p><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><strong>Preferred Qualifications</strong></span></p> <ul> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Excellent technical leadership, communication, and cross-functional project management skills.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Proven track record of successfully leading multiple link-level products through validation and high-volume production release.</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">Experience scaling engineering teams through hypergrowth, establishing career development frameworks, and fostering a high-performance environment.&nbsp;</span></li> <li style="font-family: arial, helvetica, sans-serif; font-size: 10pt;"><span style="font-family: arial, helvetica, sans-serif; font-size: 10pt;">&nbsp;Demonstrated capability to align executive stakeholders on technical roadmaps, resource trade-offs, and risk mitigation strategies.</span></li> </ul> <p>&nbsp;</p><div class="content-pay-transparency"><div class="pay-input"><div class="description"><p>We offer competitive compensation. The base salary range for this role determined based on location, experience, educational background, and market data.</p></div><div class="title">Salary Range: total compensation goes beyond base salary, it also includes a new hire equity grant, annual performance-based equity, and other rewards that recognize your impact and contribution.</div><div class="pay-range"><span>$261,000</span><span class="divider">&mdash;</span><span>$300,000 USD</span></div></div></div><div class="content-conclusion"><h3>Benefits</h3> <div> <ul> <li>Comprehensive Health Care Plan (Medical, Dental &amp; Vision)</li> <li>Retirement Savings Matching Program</li> <li>Life Insurance (Basic, Voluntary &amp; AD&amp;D)</li> <li>Generous Time Off (Vacation, Sick &amp; Public Holidays)</li> <li>Paid Family Leave</li> <li>Short Term &amp; Long Term Disability</li> <li>Training &amp; Development</li> <li>Commuter Benefits</li> <li>Flexible, hybrid workplace model</li> <li>Equity grants (applicable to full-time employees)</li> </ul> <p>Benefits eligibility may vary depending on your employment status and location. Lightmatter recruits, employs, trains, compensates, and promotes regardless of race, religion, color, national origin, sex, disability, age, veteran status, and other protected status as required by applicable law.</p> <p><strong>Export Control</strong></p> <p>Candidates should have capacity to comply with the federally mandated requirements of U.S. export control laws.&nbsp;</p> </div></div>