
Principal Embedded Software Engineer - Analog Connectivity at Astera Labs
CanadaFull-timeSoftware EngineeringPosted 17 days ago
About the Role
<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">The Role and Its Impact</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Our analog connectivity product portfolio includes sophisticated mixed-signal components that form the critical signal conditioning path in both optical modules and copper interconnects: transimpedance amplifiers, </span><span data-ccp-parastyle="Normal (Web)">transmit</span><span data-ccp-parastyle="Normal (Web)"> drivers, continuous-time linear equalizers, and integrated analog subsystems. The firmware you develop will directly control the adaptive behavior, calibration sequences, and real-time performance optimization of these analog circuits deployed in data centers worldwide.</span></span> <span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">As a <strong>Principal Engineer</strong> in our Signal Connectivity Engineering group, </span><span data-ccp-parastyle="Normal (Web)">you'll</span><span data-ccp-parastyle="Normal (Web)"> shape firmware architectures that directly </span><span data-ccp-parastyle="Normal (Web)">impact</span><span data-ccp-parastyle="Normal (Web)"> the performance and reliability of connectivity solutions powering AI infrastructure globally. </span><span data-ccp-parastyle="Normal (Web)">You'll</span><span data-ccp-parastyle="Normal (Web)"> take end-to-end ownership of the software lifecycle, from pre-silicon planning through production deployment and field support. You will bridge the gap between sophisticated analog circuit design and the software intelligence </span><span data-ccp-parastyle="Normal (Web)">required</span><span data-ccp-parastyle="Normal (Web)"> to make these circuits adaptive and robust. Working at the intersection of embedded systems and analog control, </span><span data-ccp-parastyle="Normal (Web)">you'll</span><span data-ccp-parastyle="Normal (Web)"> collaborate closely with mixed-signal designers, systems architects, silicon validation engineers, and customer teams while building and leading a technical team in a high-growth company.</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">We're</span><span data-ccp-parastyle="Normal (Web)"> a startup, and this role reflects that reality. </span><span data-ccp-parastyle="Normal (Web)">You'll</span><span data-ccp-parastyle="Normal (Web)"> have responsibilities spanning firmware architecture, team building, CI/CD infrastructure, customer engagement, and lab automation. </span><span data-ccp-parastyle="Normal (Web)">We're</span><span data-ccp-parastyle="Normal (Web)"> looking for someone who thrives wearing multiple hats and is energized by jumping into whatever needs doing. We recognize this breadth and reward it accordingly.</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">This position offers an opportunity to build and lead a team from the </span><span data-ccp-parastyle="Normal (Web)">ground up</span><span data-ccp-parastyle="Normal (Web)">. </span><span data-ccp-parastyle="Normal (Web)">You'll</span><span data-ccp-parastyle="Normal (Web)"> help hire two engineers and </span><span data-ccp-parastyle="Normal (Web)">will play</span><span data-ccp-parastyle="Normal (Web)"> an active role in recruiting as the team grows. Depending on your preferences, you can either manage these engineers directly from day one, or mentor them while </span><span data-ccp-parastyle="Normal (Web)">remaining</span><span data-ccp-parastyle="Normal (Web)"> in a technical lead </span><span data-ccp-parastyle="Normal (Web)">capacity,</span><span data-ccp-parastyle="Normal (Web)"> either path is fully supported.</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><em><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Level is negotiable based on experience and qualifications.</span></span></em><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Location & Travel</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">This is a remote position, but candidates must be </span><span data-ccp-parastyle="Normal (Web)">located</span><span data-ccp-parastyle="Normal (Web)"> and authorized to work in the Ottawa area. Occasional travel to our San Jose headquarters will be </span><span data-ccp-parastyle="Normal (Web)">required</span><span data-ccp-parastyle="Normal (Web)">, </span><span data-ccp-parastyle="Normal (Web)">approximately twice</span><span data-ccp-parastyle="Normal (Web)"> per year for chip bring-ups and project coordination.</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Core Responsibilities</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Software Ownership & Architecture</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<ul>
<li><span data-contrast="auto">Own the complete firmware stack for analog connectivity products, from low-level hardware abstraction through customer-facing APIs</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Design and implement embedded firmware that controls complex analog subsystems including adaptive equalization, gain control, PLL/CDR feedback loops, and thermal management</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Architect calibration algorithms, state machines, and control flow for managing analog tuning parameters across process, voltage, and temperature variation</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Establish software quality gates and validation criteria at each development phase</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
</ul>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Technical Leadership & Team Building</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<ul>
<li><span data-contrast="auto">Help recruit and hire two engineers to join your team, with ongoing involvement in recruiting as the team expands</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Lead your team, whether through direct management or technical mentorship, through design, implementation, code review, and debugging activities</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Lead architecture discussions and technical tradeoff decisions; balance performance, code size, maintainability, and time-to-market</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Serve as the go-to technical expert for mixed-signal firmware and analog control loop behavior</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Drive difficult debug sessions in the lab and through remote customer support, coordinating across silicon design, systems, and applications teams</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
</ul>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Cross-Functional Collaboration</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<ul>
<li><span data-contrast="auto">Partner with analog circuit designers to understand hardware behavior, tuning requirements, and failure modes</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Collaborate with product applications to translate customer requirements into firmware features and APIs</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Work alongside silicon and system validation teams to develop test plans, automate characterization flows, and verify firmware behavior across corner cases</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Coordinate with field applications engineers to support customer integration and resolve deployment issues</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Provide regular project updates on progress, risks, dependencies, and technical challenges</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
</ul>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">What You Bring</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Required Qualifications:</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<ul>
<li><span data-contrast="auto">BS/MS in Computer Science, Electrical Engineering, Computer Engineering, or related field</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">10+ years of embedded C/C++ firmware development in resource-constrained environments</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Proven track record as a Technical Lead or Team Lead on embedded projects from architecture through production</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Deep understanding of microcontroller architecture, memory-mapped peripherals, interrupt handling, and bare-metal firmware design</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Solid experience with analog control loops: PID controllers, feedback systems, adaptive algorithms, and tuning methodologies</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Strong proficiency with Linux development tools: gcc/clang, make, bash scripting, gdb, and git</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Excellent verbal and written communication skills; ability to explain complex technical concepts clearly</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Demonstrated problem-solving ability and systematic debugging approach on real hardware</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Comfort with ambiguity and a willingness to take on whatever challenges arise in a fast-moving startup environment</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
</ul>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Highly Valued Skills:</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<ul>
<li><span data-contrast="auto">Experience with Python for test automation, data analysis, or general scripting</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Hands-on experience building and maintaining Jenkins CI/CD pipelines and automated test infrastructure</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Familiarity with mixed-signal systems: ADC/DAC interfaces, sensor readout, analog signal conditioning, calibration techniques</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Knowledge of transimpedance amplifiers, transmit drivers, equalizers (CTLE/DFE), CDR/PLL circuits, or related analog signal path components</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Background in optical module firmware, pluggable optics/AEC standards (MSA/CMIS), retimer or gearbox firmware/API, or high-speed copper connectivity</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Experience with lab equipment: oscilloscopes, power supplies, logic analyzers, Viavi/Lecroy/Exfo/Keysight/</span><span data-contrast="auto">Tektronix</span><span data-contrast="auto">/etc.</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Exposure to SERDES, Ethernet PHYs, layer 1 devices, or PCIe physical layer implementations</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Understanding of signal integrity concepts: equalization, channel loss, jitter, eye diagrams, and link margin</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Familiarity with FPGA emulation, pre-silicon validation, or hardware simulation environments</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Experience with RTOS, device drivers, coroutines</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto">Prior people management, mentorship, or recruiting experience</span><span data-ccp-props="{"201341983":0,"335559739":0,"335559740":240}"> </span></li>
</ul>
<p><strong><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Compensation</span></span></strong><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p>
<p><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">Salary range is CAD $184,500 to $205,000 depending on experience, level, and business need. This role will include a discretionary bonus, e</span></span><span data-contrast="auto"><span data-ccp-parastyle="Normal (Web)">xtremely</span><span data-ccp-parastyle="Normal (Web)"> competitive equity package, comprehensive health/dental/vision coverage, professional development opportunities, and a culture that values technical excellence, collaboration, and innovation.</span></span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559738":0,"335559739":0,"335559740":240}"> </span></p><div class="content-conclusion"><p>We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.</p></div>
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