Firmware Engineer Tech Lead at Astera Labs

<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p><strong>Firmware Engineer Tech Lead</strong></p> <p>Bangalore, India</p> <p>Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at&nbsp;<a href="http://www.asteralabs.com/">www.asteralabs.com</a>.</p> <p><strong>Role Overview</strong></p> <p>The mission of this role is to architect and develop firmware and microcontroller subsystems for Astera Labs’ SoC and systems products. As a&nbsp;<strong>Firmware Engineer Tech Lead&nbsp;</strong>you are responsible for implementing the major differentiating features of Astera Labs’ products. As such, firmware is considered equally important to the hardware, and the firmware team is often customer-facing accordingly to ensure the needs of the customer are fully comprehended.&nbsp;</p> <p><strong>Basic Qualifications</strong>&nbsp;</p> <ul> <li>Strong academic and technical background in electrical engineering. At a minimum, a Bachelor’s in EE or Computer Science is required, and a&nbsp;Master’s&nbsp;is preferred.&nbsp;</li> </ul> <ul> <li>Minimum 5 years’ experience supporting or developing complex SoC/silicon products for Server, Storage, and/or Networking applications.&nbsp;</li> </ul> <ul> <li>Experience developing firmware to&nbsp;execute in&nbsp;on-chip microcontrollers as well as C-language software development kits (SDKs) to execute on system management controllers (e.g. BMC).&nbsp;</li> </ul> <ul> <li>Experience working with logic designers to architect and verify HW-SW interfaces on complex SoCs.&nbsp;</li> </ul> <ul> <li>Professional attitude with the ability to prioritize a dynamic list of multiple tasks, to plan and prepare for customer meetings in advance, and to work with minimal guidance and supervision.&nbsp;</li> </ul> <ul> <li>Entrepreneurial, open-minded behavior and can-do attitude. Think and act fast with the customer in mind!&nbsp;</li> </ul> <p><strong>Required Experience</strong>&nbsp;</p> <ul> <li>Experience working on PCIe-Express (Gen-3 and above) protocol, including working with analyzers and exercisers to debug protocol issues.&nbsp;</li> </ul> <ul> <li>High level of proficiency in C (preferred) or C++, including development of C-based SDKs.&nbsp;</li> </ul> <ul> <li>High level of proficiency in Python for automating pre-processors/post-processors and FW QC.&nbsp;</li> </ul> <ul> <li>Working knowledge of software/firmware build environments,&nbsp;gcc/Make,&nbsp;Doxygen, and GitHub. &nbsp;</li> </ul> <ul> <li>Familiarity with SoC interfaces to common IP blocks such as PCIe Controllers, DDR Controllers, NVME Controllers, AMBA/AHB interfaces, on-chip memory interfaces, and other similar interfaces.&nbsp;</li> </ul> <p><strong>Preferred Experience</strong>&nbsp;</p> <ul> <li>Experience with PAM4 SerDes with working knowledge of Tx/Rx equalization, adaptation, CDR and SerDes link budgets.&nbsp;</li> </ul> <ul> <li>Hands-on experience with PCIe devices in Server, Storage, and/or Networking equipment. &nbsp;</li> </ul> <ul> <li>Experience developing embedded firmware for PCIe or Ethernet Switch products.&nbsp;</li> </ul><div class="content-conclusion"><p>We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.</p></div>