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Astera Labs

Principal Optical Reliability Engineer at Astera Labs

San Jose, California, United StatesFull-timeQualityPosted 17 days ago

About the Role

<div class="content-intro"><p><span data-teams="true">Astera Labs (NASDAQ: ALAB) provides rack-scale AI infrastructure through purpose-built connectivity solutions. By collaborating with hyperscalers and ecosystem partners, Astera Labs enables organizations to unlock the full potential of modern AI. Astera Labs’ Intelligent Connectivity Platform integrates CXL®, Ethernet, NVLink, PCIe®, and UALink™ semiconductor-based technologies with the company’s COSMOS software suite to unify diverse components into cohesive, flexible systems that deliver end-to-end scale-up, and scale-out connectivity. The company’s custom connectivity solutions business complements its standards-based portfolio, enabling customers to deploy tailored architectures to meet their unique infrastructure requirements. Discover more at <a id="menurhut" class="fui-Link ___1q1shib f2hkw1w f3rmtva f1ewtqcl fyind8e f1k6fduh f1w7gpdv fk6fouc fjoy568 figsok6 f1s184ao f1mk8lai fnbmjn9 f1o700av f13mvf36 f1cmlufx f9n3di6 f1ids18y f1tx3yz7 f1deo86v f1eh06m1 f1iescvh fhgqx19 f1olyrje f1p93eir f1nev41a f1h8hb77 f1lqvz6u f10aw75t fsle3fq f17ae5zn" href="http://www.asteralabs.com/" target="_blank">www.asteralabs.com</a>.</span></p></div><p><strong><span data-contrast="auto">Role Overview</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <p><span data-contrast="auto">Astera Labs is&nbsp;seeking&nbsp;an experienced and hands-on Principal Optical Reliability Engineer to drive&nbsp;reliability&nbsp;strategy across our&nbsp;cutting-edge&nbsp;portfolio of connectivity products, with a focus on silicon photonics and optical components. As AI infrastructure demands unprecedented bandwidth and performance, this role is critical to&nbsp;ensuring&nbsp;our products deliver exceptional reliability through end-of-life.</span><span data-ccp-props="{}">&nbsp;</span></p> <p><span data-contrast="auto">You will lead reliability initiatives and serve as an internal consultant, defining and implementing methodologies across&nbsp;component,&nbsp;chiplet, photonic, and board-level products. This is a high-impact position where&nbsp;you'll&nbsp;partner closely with design, product/test&nbsp;engineering,&nbsp;quality,&nbsp;and manufacturing teams to embed reliability-aware principles.</span><span data-ccp-props="{}">&nbsp;</span></p> <p><strong><span data-contrast="auto">Key Responsibilities</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><strong><span data-contrast="auto">Reliability Strategy &amp; Methodology</span></strong><span data-ccp-props="{}">&nbsp;</span> <ul> <li><span data-contrast="auto">Develop and implement comprehensive design reliability methodologies for semiconductor circuits and optical systems, including pre-qualification, production release, ongoing reliability monitoring (ORM), and soft error evaluation</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Lead the application of advanced reliability modeling techniques to analyze trade-offs between performance and long-term product reliability</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Establish and refine usage models to guide design-phase reliability assessments and integrate learning from manufacturing and field return data in post-silicon validation</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> </li> <li data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{&quot;335552541&quot;:1,&quot;335559685&quot;:720,&quot;335559991&quot;:360,&quot;469769226&quot;:&quot;Symbol&quot;,&quot;469769242&quot;:[8226],&quot;469777803&quot;:&quot;left&quot;,&quot;469777804&quot;:&quot;&quot;,&quot;469777815&quot;:&quot;multilevel&quot;}" data-aria-posinset="2" data-aria-level="1"><strong><span data-contrast="auto">Failure Analysis &amp; Root Cause</span></strong><span data-ccp-props="{}">&nbsp;</span> <ul> <li><span data-contrast="auto">Apply expert knowledge of semiconductor and optical reliability failure mechanisms, including Electrostatic Discharge (ESD), Latch-Up (LU), Soft Errors, Gate Oxide Time-Dependent Dielectric Breakdown (GOX TDDB), Electromigration, Device Aging, laser degradation, and photodetector wear-out</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Utilize a hands-on approach to&nbsp;comprehend&nbsp;silicon, photonic, and package-level failure mechanisms, collaborating seamlessly with internal and external teams to drive root cause analysis and resolution</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Evaluate qualification results for new product introductions and drive continuous improvement in design-for-reliability tools, processes, and organizational knowledge</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> </li> <li data-leveltext="" data-font="Symbol" data-listid="1" data-list-defn-props="{&quot;335552541&quot;:1,&quot;335559685&quot;:720,&quot;335559991&quot;:360,&quot;469769226&quot;:&quot;Symbol&quot;,&quot;469769242&quot;:[8226],&quot;469777803&quot;:&quot;left&quot;,&quot;469777804&quot;:&quot;&quot;,&quot;469777815&quot;:&quot;multilevel&quot;}" data-aria-posinset="3" data-aria-level="1"><strong><span data-contrast="auto">Cross-Functional Collaboration &amp; Vendor Management</span></strong><span data-ccp-props="{}">&nbsp;</span> <ul> <li><span data-contrast="auto">Collaborate across design, product engineering, manufacturing, and reliability teams to capture and institutionalize best practices that improve product robustness and reduce DPPM</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Serve as a subject matter expert helping design engineers incorporate reliability-aware design principles early in development</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Work closely with vendors to review and interpret&nbsp;component&nbsp;specifications, reliability data, and qualification reports, including Mean Time Between Failures (MTBF), failure-rate predictions,&nbsp;derating&nbsp;analysis, and stress test results</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> </li> </ul> <p><strong><span data-contrast="auto">Basic Qualifications</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Master's degree in Electrical Engineering, Applied Physics, Photonics, or a related field</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">8+ years of experience in semiconductor reliability, with direct experience in silicon photonics, optical components, or optoelectronic device reliability</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Strong background in semiconductor physics, device modeling, and reliability verification techniques including statistical and probability techniques</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Deep knowledge of advanced packaging technologies, including 2.5D, 3D, and&nbsp;chiplet&nbsp;architectures, as well as module and system board reliability</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Working knowledge of electronic components/devices and their failure modes and mechanisms</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Proven leadership in driving complex technical issues to closure across global, cross-functional teams</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">Preferred Qualifications</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">PhD in Electrical Engineering, Applied Physics, or Photonics</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with silicon photonics reliability, including laser aging, photodetector degradation, and fiber coupling reliability</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Knowledge of high-performance&nbsp;compute&nbsp;and AI cloud infrastructure, as well as switch/network interfaces</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with PCBA (printed circuit board assembly) design, fabrication, and validation testing</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Strong experience in product reliability in the context of mechanical, thermal, and electrical&nbsp;stresses&nbsp;for modules and board assemblies</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Excellent communication skills with the ability to articulate technical concepts clearly across all levels of the organization</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Salary range is $185,000 to $230,000 depending on experience, level, and business&nbsp;need. This role may be eligible for discretionary&nbsp;bonus,&nbsp;incentives&nbsp;and benefits.</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><span data-ccp-props="{}">&nbsp;</span><span data-contrast="auto">Salary range is $185,000 to $230,000 depending on experience, level, and business&nbsp;need. This role may be eligible for discretionary&nbsp;bonus,&nbsp;incentives&nbsp;and benefits.</span><span data-ccp-props="{}">&nbsp;</span></p><div class="content-conclusion"><p>We know that creativity and innovation happen more often when teams include diverse ideas, backgrounds, and experiences, and we actively encourage everyone with relevant experience to apply, including people of color, LGBTQ+ and non-binary people, veterans, parents, and individuals with disabilities.</p></div>