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K2 Space Corporation

Mixed-Signal Behavioral Modeling Engineer at K2 Space Corporation

United States - RemoteFull-timeRemoteSiliconPosted about 1 month ago
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About the Role

<div class="content-intro"><p class="p1">K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit.&nbsp;Backed by <a href="https://www.forbes.com/sites/aliciapark/2025/12/11/this-startup-is-building-huge-satellites-for-an-underused-interstellar-sweet-spot/?ctpv=searchpage">$450M</a> from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others <span class="s1">– </span>with an additional $500M in signed contracts across commercial and US government customers – we’re mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.<span class="Apple-converted-space">&nbsp;</span></p> <p class="p1">The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today’s and tomorrow’s massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.<span class="Apple-converted-space">&nbsp;</span></p> <p class="p1">With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization.&nbsp;<span class="TextRun SCXW79998266 BCX0" lang="EN-US" data-contrast="auto"><span class="NormalTextRun SCXW79998266 BCX0">If you are a motivated individual who thrives in a fast-paced environment and </span><span class="NormalTextRun SCXW79998266 BCX0">you're</span><span class="NormalTextRun SCXW79998266 BCX0"> excited about contributing to the success of a groundbreaking Series C</span><span class="NormalTextRun SCXW79998266 BCX0"> space startup, </span><span class="NormalTextRun SCXW79998266 BCX0">we’d</span><span class="NormalTextRun SCXW79998266 BCX0"> love for you to apply.</span></span><span class="EOP SCXW79998266 BCX0" data-ccp-props="{&quot;335559738&quot;:240,&quot;335559739&quot;:240}">&nbsp;</span></p></div><p><strong><span data-contrast="auto">The Role</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <p><span data-contrast="auto">We are seeking a&nbsp;Mixed-Signal Behavioral Modeling&nbsp;Engineer&nbsp;to own the creation of behavioral modeling and drive mixed-signal verification&nbsp;methodology&nbsp;from the ground up. You will be part of a collaborative design team developing&nbsp;state-of-the-art&nbsp;mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space.&nbsp;Your work will directly influence top-level integration and silicon&nbsp;tapeout&nbsp;success. This is a high-impact, technical role with significant ownership across modeling,&nbsp;methodology, verification, and cross-functional alignment with RF, analog, and digital teams.&nbsp;</span><span data-ccp-props="{&quot;335551550&quot;:6,&quot;335551620&quot;:6}">&nbsp;</span></p> <p><strong><span data-contrast="auto">Responsibilities</span></strong><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Develop high-level behavioral models for analog and mixed-signal IP (ADCs, DACs, PLLs, LDOs, RF front-end blocks, biasing,&nbsp;amplifiers,&nbsp;etc.).</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Create abstracted models using&nbsp;Verilog, Verilog-AMS, or&nbsp;SystemVerilog.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Develop regression infrastructure and&nbsp;mixed-signal&nbsp;testbenches enabling co-simulation (digital + analog).</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Integrate AMS models into digital verification environments (UVM-based).</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Define and build the mixed-signal verification&nbsp;methodology&nbsp;for top-level SoC and subsystem verification.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Support architectural exploration through early-phase modeling and system-level simulations.&nbsp;</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Collaborate with analog/RF designers to capture real-world analog behaviors and map them into&nbsp;accurate&nbsp;behavioral abstractions.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Work with digital and verification teams to ensure seamless integration of AMS models.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Provide modeling and verification insights during architectural reviews, PDR/CDR, and silicon bring-up.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Act as technical leader and subject-matter expert. </span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">Required&nbsp;Qualifications</span></strong><span data-contrast="auto"> </span><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or related field.</span><span data-ccp-props="{&quot;201341983&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></li> <li><span data-contrast="auto">2+ years of experience in analog/mixed-signal modeling and/or AMS verification.</span><span data-ccp-props="{&quot;201341983&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></li> <li><span data-contrast="auto">Hands-on experience with&nbsp;SystemVerilog, Verilog-AMS,&nbsp;wreal/RNM, or equivalent modeling languages.</span><span data-ccp-props="{&quot;201341983&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></li> <li><span data-contrast="auto">Strong understanding of analog/mixed-signal circuits (PLLs, LDOs, ADC/DACs, RF/IF paths, clocking, amplifiers).</span><span data-ccp-props="{&quot;201341983&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with mixed-signal co-simulation environments (Cadence AMS Designer, Synopsys VCS&nbsp;AMS, or similar).</span><span data-ccp-props="{&quot;201341983&quot;:0,&quot;335559740&quot;:240}">&nbsp;</span></li> </ul> <p><strong><span data-contrast="auto">Preferred&nbsp;Qualifications</span></strong><span data-contrast="auto"> </span><span data-ccp-props="{}">&nbsp;</span></p> <ul> <li><span data-contrast="auto">Experience building AMS verification methodologies from scratch.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Familiarity with UVM-based verification and digital design flows.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Knowledge of signal processing theory, RF system modeling, or communication systems.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience with MATLAB/Simulink, Python modeling, or&nbsp;SystemC&nbsp;AMS for high-level architectural modeling.</span><span data-ccp-props="{}">&nbsp;</span></li> <li><span data-contrast="auto">Experience&nbsp;working in cross-functional, geographically distributed teams.&nbsp;</span><span data-ccp-props="{}">&nbsp;</span></li> </ul> <p><strong>Compensation and Benefits:</strong></p> <ul> <li>Base salary range for this role is $130,000 – $180,000 + equity in the company</li> <li>Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level</li> <li>Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks</li> </ul><div class="content-conclusion"><p>If you don’t meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!</p> <p>If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.</p> <p><strong>Export Compliance</strong></p> <p>As defined in the ITAR, “U.S. Persons” include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a “U.S. Person.”</p> <p>The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a “U.S. person” as defined by&nbsp;<a class="c-link" href="https://www.law.cornell.edu/cfr/text/22/120.15" target="_blank">22 C.F.R. § 120.15</a> or otherwise eligible for a federally issued export control license.</p> <p><strong>Equal Opportunity</strong></p> <p>K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.</p></div>

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